Publicado

2021-10-15

DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization

Palabras clave:

Grid-Connected Converter, Digital Signal Processor (DSP, Synchronous Reference Frame Phase Locked Loop (SRF-PLL), Grid Synchronization,, Phase Locked Loop (PLL) (en)

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Autores/as

  • Jose Andres Lopez Muñoz Universidad Santo Tomas
  • Carlos A. Torres Pinzón Universidad Santo Tomás
  • Carlos J. Mojica Casallas Universidad Santo Tomas

In this paper, a review of Phase Locked Loop(PLL) algorithms, is proposed methodology is based on voltagerepresentation in a three coordinates: natural (abc), stationary(αβ) and rotating coordinates (dq), in order to meet the gridsynchronization requirements. Grid synchronization algorithmsplay an essential role for distributed power generation systems,so one of the synchronization strategies using phase-locked loop(PLL) and its various types for power grid synchronization isanalyzed.The selected algorithm is developed in rotational coordinates,is the Synchronous Reference Frame PLL (SRF-PLL) and itscharacteristics are referred to. The main application of thesynchronization method using power electronic converters as anintegral part of their systems. to meet the requirements of syn-chronization with the network. Grid synchronization algorithmsplay an essential role for distributed generation systems, so oneof the synchronization strategies using phase-locked loop (PLL)and its various types for synchronization with the power grid isdiscussed.

Referencias

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Se-Kyo Chung, “A phase tracking system for three phase utility interfaceinverters,”IEEE Transactions on Power Electronics, vol. 15, no. 3, pp.431–438, May 2000.

V. Kaura and V. Blasko, “Operation of a phase locked loop systemunder distorted utility conditions,”IEEE Transactions on Industry Ap-plications, vol. 33, no. 1, pp. 58–63, Jan 1997.

B. Singh, K. Al-Haddad, and A. Chandra, “A review of active filters forpower quality improvement,”IEEE Transactions on Industrial Electron-ics, vol. 46, no. 5, pp. 960–971, Oct 1999.

S. Shinnaka, “A robust single-phase pll system with stable and fasttracking,”IEEE Transactions on Industry Applications, vol. 44, no. 2,pp. 624–633, March 2008.

C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. Lambert-Torres,B. K. Bose, and S. U. Ahn, “A digital pll scheme for three-phase systemusing modified synchronous reference frame,”IEEE Transactions onIndustrial Electronics, vol. 57, no. 11, pp. 3814–3821, Nov 2010.[Online]. Available: https://ieeexplore.ieee.org/document/5409576

S. S. A. Men ́endez,Aportaci ́on al control del convertidor CC/CA detres niveles. Universitat Polit`ecnica de Catalunya, 2004.

X.-Q. Guo, W.-Y. Wu, and H.-R. Gu, “Phase locked loop and syn-chronization methods for grid-interfaced converters: a review,”PrzegladElektrotechniczny, vol. 87, no. 4, pp. 182–187, 2011.

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L. G. B. Rolim, D. R. da Costa, and M. Aredes, “Analysis andsoftware implementation of a robust synchronizing pll circuit basedon the pq theory,”IEEE Transactions on Industrial Electronics,vol. 53, no. 6, pp. 1919–1926, Dec 2006. [Online]. Available:https://ieeexplore.ieee.org/document/4016391

Cómo citar

APA

Lopez Muñoz, J. A., Torres Pinzón, C. A. y Mojica Casallas, . C. J. . (2023). DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization. Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL, 10. https://revistas.unal.edu.co/index.php/SICEL/article/view/97101

ACM

[1]
Lopez Muñoz, J.A., Torres Pinzón, C.A. y Mojica Casallas, .C.J. 2023. DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization. Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL. 10, (mar. 2023).

ACS

(1)
Lopez Muñoz, J. A.; Torres Pinzón, C. A.; Mojica Casallas, . C. J. . DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization. SICEL 2023, 10.

ABNT

LOPEZ MUÑOZ, J. A.; TORRES PINZÓN, C. A.; MOJICA CASALLAS, . C. J. . DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization. Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL, [S. l.], v. 10, 2023. Disponível em: https://revistas.unal.edu.co/index.php/SICEL/article/view/97101. Acesso em: 22 ago. 2024.

Chicago

Lopez Muñoz, Jose Andres, Carlos A. Torres Pinzón, y Carlos J. Mojica Casallas. 2023. «DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization». Simposio Internacional Sobre La Calidad De La Energía Eléctrica - SICEL 10 (marzo). https://revistas.unal.edu.co/index.php/SICEL/article/view/97101.

Harvard

Lopez Muñoz, J. A., Torres Pinzón, C. A. y Mojica Casallas, . C. J. . (2023) «DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization», Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL, 10. Disponible en: https://revistas.unal.edu.co/index.php/SICEL/article/view/97101 (Accedido: 22 agosto 2024).

IEEE

[1]
J. A. Lopez Muñoz, C. A. Torres Pinzón, y . C. J. . Mojica Casallas, «DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization», SICEL, vol. 10, mar. 2023.

MLA

Lopez Muñoz, J. A., C. A. Torres Pinzón, y . C. J. . Mojica Casallas. «DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization». Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL, vol. 10, marzo de 2023, https://revistas.unal.edu.co/index.php/SICEL/article/view/97101.

Turabian

Lopez Muñoz, Jose Andres, Carlos A. Torres Pinzón, y Carlos J. Mojica Casallas. «DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization». Simposio Internacional sobre la Calidad de la Energía Eléctrica - SICEL 10 (marzo 21, 2023). Accedido agosto 22, 2024. https://revistas.unal.edu.co/index.php/SICEL/article/view/97101.

Vancouver

1.
Lopez Muñoz JA, Torres Pinzón CA, Mojica Casallas CJ. DSP-Based Phase Locked Loop designMethodology for Three Phase Grid Synchronization. SICEL [Internet]. 21 de marzo de 2023 [citado 22 de agosto de 2024];10. Disponible en: https://revistas.unal.edu.co/index.php/SICEL/article/view/97101

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