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Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction
Verificación de un modelo de dispositivo sin defectos utilizando herramientas TCAD: desde la formación de transistores bipolares hasta la extracción de características I-V
Keywords:
Electronics engineering education, laboratory learning environment, learning technology, TCAD tools (en)educación en ingeniería electrónica, entorno de aprendizaje de laboratorio, tecnología de aprendizaje, herramientas TCAD (es)
This paper describes the analysis of processes used in microand nanoelectronic device manufacturing. It also presents an exemplary and novel laboratory exercise in which an epitaxial planar n + pn bipolar transistor with junction isolation is illustrated and analyzed stepbystep. Only seven photolithography steps are used to obtain this bipolar transistor structure: for buried layer formation, for junction transistor isolation and collectors regions formation, for base region formation, for emitter and collector n+ region formation, for contact windows, for first aluminum metallization, and, finally, for passivation. Silvaco TCAD software tools are used to implement all of these manufacturing processes and to simulate the resulting IV characteristics of all presented semiconductor structures. This type of laboratory work provides students with basic knowledge and a consistent understanding of bipolar transistor manufacturing, as well as facilitating theoretical understanding, analysis, and simulation of various semiconductor manufacturing processes without the need for costly and lengthy technological manufacturing experiments. This article also presents the conclusions and other benefits of such laboratory work, as well as possible recommendations for further improvement or expansion.
Este artículo describe el análisis de los procesos utilizados en la fabricación de dispositivos de micro y nanoelectrónica. También presenta un ejercicio de laboratorio ejemplar y novedoso en el que se ilustra y analiza paso a paso un transistor bipolar plano n + pn epitaxial con aislamiento de unión. Solo se utilizan siete pasos de fotolitografía para obtener esta estructura de transistor bipolar: para la formación de capas enterradas, para el aislamiento del transistor de unión y la formación de regiones colectoras, para la formación de regiones base, para la formación de regiones emisoras y colectoras n+, para ventanas de contacto, para la primera metalización de aluminio, y finalmente para pasivación. Las herramientas de software Silvaco TCAD se utilizan para implementar todos estos procesos de fabricación y para simular las características IV resultantes de todas las estructuras de semiconductores presentadas. Este tipo de trabajo de laboratorio proporciona a los estudiantes conocimientos básicos y una comprensión constante de la fabricación de transistores bipolares. Asimismo, este estudio facilita la comprensión teórica, el análisis y la simulación de varios procesos de fabricación de semiconductores sin la necesidad de experimentos de fabricación tecnológicos costosos y largos. Este artículo también presenta las conclusiones y otros beneficios de dicho trabajo de laboratorio, así como posibles recomendaciones para una su mejora o expansión.
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References
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