Published

2011-09-01

Analysis of a cascaded multilevel inverter with fault-tolerant control

Análisis de un inversor multinivel en cascada con tolerancia a fallas

DOI:

https://doi.org/10.15446/ing.investig.v31n3.26388

Keywords:

modulation, in-phase pulse width modulation (IPDPWM), fault-tolerance, cascaded multilevel inverter (en)
modulación IPDPWM, tolerancia a fallas, inversor multinivel en cascada (es)

Authors

  • Jesús Aguayo Alquicira Centro Nacional de Investigación y Desarrollo Tecnológico—CENIDET
  • Abraham Claudio Sánchez Centro Nacional de Investigación y Desarrollo Tecnológico—CENIDET
  • Luis Gerardo Vela Valdés Centro Nacional de Investigación y Desarrollo Tecnológico— CENIDET
  • Marco Antonio Rodríguez Universidad Autónoma del Carmen
  • Rodolfo Amalio Vargas Méndez Centro Nacional de Investigación y Desarrollo Tecnológico—CENIDET

Cascaded multilevel inverters are widely used in industry for speed control of induction motors and, even when the converters' operation is highly reliable, several faults can occur, leading to poor engine performance or even causing the whole system to stop. It is desirable to keep the system operational when a failure occurs, even when degraded, and implementing fault-tolerant systems are thus a good choice. This paper presents a general strategy for fault-tolerant control in a 7-level cascaded multilevel inverter (the faults are in semiconductor devices); the paper includes simulation and experimental results to validate the method.

Los inversores multinivel en cascada son ampliamente utilizados en la industria para el control de la velocidad en motores y aun cuando los inversores son muy confiables en su operación, diversas fallas en ellos pueden ocurrir, llegando a degradar el comportamiento de los motores o incluso producirse el paro total del sistema. Cuando una falla se presenta es deseable mantener en operación el sistema aun en régimen degradado y la implementación de sistemas tolerantes a fallas en ese tipo de dispositivos son una buena opción. En este trabajo se ofrece una estrategia generalizada relativa a tolerar fallas en los dispositivos semiconductores de un inversor multinivel en cascada de siete niveles y se incluyen los resultados en simulación y experimentales para la validación del método.

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